Problem:

As part of the development of a next generation optical emission spectrometer we developed a proof-of-concept controller for an array of CCD sensors. The design had to acquire data from a dozen 3600 pixel CCDs, perform low-level signal processing, and form packets to be sent via Ethernet back to the analysis application running on a PC. The board has a TI ARM processor running Angstrom Linux coupled to a Xilinx Spartan 6 FPGA. The custom FPGA code generates CCD timing, applies signal processing, and assembles packets to be sent to the ARM processor. The system allows user selection of CCD integration time, decimation and data averaging settings.